1978 · Vapour Phase Epitaxy Rig · Work 868 of 1,871
A crystal-growth laboratory with white tiled walls, a white-painted steel frame cabinet 120 centimetres wide, its front of pale blue-grey instrument drawers with three temperature controllers showing small dark display windows and a row of black knobs, in front a horizontal tube furnace 71 centimetres long, a white-wrapped tube between two brass flanges glowing orange at its centre, enclosed in a clear acrylic box with a perforated lid, above it a bundle of coloured wires and thin stainless steel tubes, on the bench beside it a glass tube mirrored gold inside, a hand in a white lab coat sleeve turning a black knob, cold fluorescent light from above.
What it was used for
In an epitaxy reactor a new single-crystal silicon layer is grown from the gas phase onto a polished wafer. A production overview of silicon epitaxy describes chlorosilane reduction at about 900 to 1150 degrees Celsius with hydrogen as both carrier and reducing gas; the preferred silicon source is trichlorosilane, liquid at room temperature, alongside dichlorosilane and silane, which deposits at around 900 degrees. Doping is co-deposited using diborane, phosphine or arsine. Barrel reactors take batches of wafers up to 150 millimetres and reach 5 percent thickness uniformity and 7 percent resistivity uniformity.
What was new
What characterises the process is autodoping: unintended doping from the system itself - other wafers, the susceptor, the reactor walls - plus outdiffusion from the heavily doped substrate and gas-phase doping from the wafer's back and edge. It smears the transition region and degrades radial resistivity uniformity. The barb is in the purpose itself: in CMOS logic and memory the epitaxial layer is put on a heavily doped substrate partly because that suppresses latch-up - and that same substrate poisons the layer from below. The countermeasure is a back-seal of 0.3 to 1 micrometre CVD silicon dioxide, or 15 to 20 micrometres of epitaxy on the back side.
What the sources leave open: The source opened is a 2017 overview describing the process, not a particular 1978 machine; it gives the back seal as a wafer maker's measure, and susceptor modifications for double-side-polished 200 and 300 mm wafers. It gives no front-side layer thickness and no prices; deposition rates appear only in a diagram taken from Runyan and Bean (1994). No manufacturer or model of a 1978 reactor is documented here.